1. Technical Field
The present invention relates to a phase-change memory device with error correction capability.
2. Description of the Related Art
As is known, phase-change memory arrays use a class of materials which have the property of changing between two phases having distinct electrical characteristics. For example, these materials may change from an amorphous phase, which is disorderly, to a crystalline or polycrystalline phase, which is orderly, and the two phases are associated to considerably different values of resistivity.
At present, alloys of elements of group VI of the periodic table, such as Te or Se, referred to as chalcogenides or chalcogenic materials, can advantageously be used in phase-change cells. The chalcogenide that currently offers the most promise is formed by a Ge, Sb and Te alloy (Ge2Sb2Te5) and is widely used for storing information in overwritable disks.
In chalcogenides, the resistivity varies by two or more orders of magnitude when the material passes from the amorphous phase (more resistive) to the crystalline phase (more conductive) and vice versa. The characteristics of the chalcogenides in the two phases are shown in FIG. 1. As may be noted, at a given read voltage, here designated by Vr, there is a variation in resistance of more than 10.
Phase change may be obtained by locally increasing the temperature, as shown in FIG. 2. Below 150° C. both phases are stable. Above 200° C. (nucleation starting temperature Tx), there takes place fast nucleation of the crystallites, and, if the material is kept at the crystallization temperature for a sufficient length of time (time t2), it changes its phase and becomes crystalline. To bring the chalcogenide back into the amorphous state, it is necessary to raise the temperature above the melting temperature Tm (approximately 600° C.) and then to cool the chalcogenide off rapidly (time t1).
From the electrical standpoint, it is possible to reach both critical temperatures, namely the crystallization temperature and the melting point, by causing a current to flow through a resistive element which heats the chalcogenic material by Joule effect.
The basic structure of a phase-change storage element 1 which operates according to the principles described above is shown in FIG. 3 and comprises a resistive element 2 (heater) and a programmable element 3. The programmable element 3 is made with a chalcogenide and is normally in the crystalline state in order to enable a good flow of current. One part of the programmable element 3 is in direct contact with the resistive element 2 and forms a phase-change portion 4.
If an electric current having an appropriate value is caused to flow through the resistive element 2, it is possible to heat the phase-change portion 4 selectively up to the crystallization temperature or to the melting temperature and to cause phase change.
The state of the chalcogenic material can be measured by applying a sufficiently small voltage, such as not to cause a sensible heating, and then reading the current flowing. Since the current is proportional to the conductivity of the chalcogenide, it is possible to discriminate the state of the chalcogenide.
Of course, the chalcogenide can be electrically switched between different intermediate states, thus affording the possibility of obtaining a multilevel memory.
In practice, a phase-change storage element 1 can be considered as a resistor which conducts a different current according to its phase. In particular, the following convention is adopted: a phase-change storage element is defined as “set” when, once appropriately biased, it conducts a detectable current (this condition may be associated to a logic condition “1”), and as “reset” when, in the same biasing conditions, it does not conduct current or conducts a much lower current than a cell that is set (logic condition “0”).
The use of phase-change storage elements has already been proposed in memory arrays formed by a plurality of memory cells arranged in rows and columns. In order to prevent the memory cells from being affected by noise caused by adjacent memory cells, generally each memory cell comprises a phase-change storage element of the type described above and a selection element (such as an MOS transistor or a diode), coupled to the phase-change storage element.
Nevertheless, read and program errors may occur, on account of a number of events that anyway affect array currents and read/program circuits either temporarily or permanently (such as noise, temperature gradients, external electromagnetic fields, local damages and the like).
It would be therefore advisable to implement measures to improve reliability of read and program operations of phase change memory arrays and to reduce errors. Such measures should also comply with general requirements, that are widely felt in the field of microelectronic industry. In particular requirements to minimize device dimensions and power consumption and to simplify array design and layout should be satisfied.